UltraZohm

Getting-Started

  • Onboarding
  • Toolchain installation
  • UltraZohm Setup
  • Tutorials

General

  • System Overview
  • Project structure
  • Infrastructure
  • How to guides
    • How to docs
    • Controller in the Loop
    • Vivado
    • Binary Export (to SD)
    • How to create a IP-core driver
    • How to debug the UltraZohm
    • Vitis
    • How to use FOC for multiple machines
  • Use-cases

MPSoC Platform

  • Platform Architecture
  • RPU Software
  • APU Software
  • Software Framework
  • Vivado Framework
  • IP Cores
  • CPLD

User Software

  • GUI

Codegeneration

  • HDL-Coder (HDL)
  • Vivado HLS (HDL)
  • Embedded-Coder (C-Code)

Hardware

  • Carrier Board
  • Adapter Cards
  • Interface to power electronics
  • Altium
UltraZohm
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  • How to guides
  • Edit on Bitbucket
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How to guides

How to guides

  • How to docs
    • Installation
    • Write the docs
    • Technical details
    • Doxygen
    • Known Issues
  • Controller in the Loop
    • Hardware in the loop
    • Implemented PL Plant models
    • Sources
  • Vivado
    • Problems and Solutions
    • Constraints
  • Binary Export (to SD)
    • Generate boot image
    • Change BOOT.bin on SD-Card
    • Resources
  • How to create a IP-core driver
    • Video
    • Setup
    • IP-Core driver: Hardware registers
    • IP-Core driver: User software
    • Integration in Vitis
  • How to debug the UltraZohm
    • First steps
  • Vitis
    • Xilinx Quick Emulator (QEMU)
    • Create new Project
    • Include math.h lib
    • Optimization Levels of the Compiler
  • How to use FOC for multiple machines
    • Vivado
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