UltraZohm

Getting-Started

  • Onboarding
  • Toolchain installation
  • UltraZohm Setup
  • Tutorials

General

  • System Overview
  • Project structure
  • Infrastructure
  • How to guides
    • How to docs
    • Controller in the Loop
    • Vivado
    • Binary Export (to SD)
    • How to create a IP-core driver
    • How to debug the UltraZohm
    • Vitis
      • Xilinx Quick Emulator (QEMU)
      • Create new Project
      • Include math.h lib
      • Optimization Levels of the Compiler
    • How to use FOC for multiple machines
  • Use-cases

MPSoC Platform

  • Platform Architecture
  • RPU Software
  • APU Software
  • Software Framework
  • Vivado Framework
  • IP Cores
  • CPLD

User Software

  • GUI

Codegeneration

  • HDL-Coder (HDL)
  • Vivado HLS (HDL)
  • Embedded-Coder (C-Code)

Hardware

  • Carrier Board
  • Adapter Cards
  • Interface to power electronics
  • Altium
UltraZohm
  • »
  • How to guides »
  • Vitis
  • Edit on Bitbucket
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Vitis

Vitis

  • Xilinx Quick Emulator (QEMU)
    • How to use QEMU for baremetal application
    • Further information to setup the QEMU emulation for vitis 2020.1
  • Create new Project
    • Workspace configuration
    • The Platform Project
    • The Application Project
    • C-Project Setup
  • Include math.h lib
  • Optimization Levels of the Compiler
    • Step-by-step
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