IP Cores

IP Cores

PWM and SS Control V3
- Idea
- Basics
- Designed by
PWM and SS Control V4
- IP-Core Hardware
- Example usage
- Driver reference
Mux Axi / ISR Trigger Control
- PWM counter events
- Interrupt sources
- ADC/ISR trigger ratio
- Example
- IP-Core
- Software driver
- Reference
ADC LTC2311
- Idea
- Basics
- Designed by
ADC LTC2311 V3
- Introduction
- Software Driver
- Functional Description
- I/O Signals (Interface)
- Terminology
- Example
- Downloads
Incremental Encoder
- Configuration
- Hardware filter of rotational speed
- IP-Core Hardware
- Software driver
Interlock Module
- Idea
- Basics
- Designed by
AXI Test IP
- Driver function reference
Interlock and Deadtime module (2L)
- Software Driver
- IP-Core Hardware
- Vivado Example
PT1 plant model
- IP-Core Hardware
- Example usage
- Driver reference
PMSM Model
- System description
- IP-Core overview
- Example usage
- Driver reference
Inverter Model
- Model Description
- IP-Core Interfaces
- Driver Reference
- Example Usage
- Reference
Data Mover / AXI2TCM
- Tightly Coupled Memory (TCM)
- IP-Core
- Software driver
- Reference
dq-Transformation IP-Core
- Vitis
- Vivado
uz_mlp_three_layer
- Usage
- Implementation details
- Interfaces
- Sources
uz_dac_spi_interface
- Software interface
- IP-Core interface (Vivado)
- References
RS Flip Flop
Inverter Adapter
- Hardware Interface Definition
- Organization of the sources
- Example Usage
- Reference
CIL PMSM
- General description
- General setup
- Examples
- References
Temperature Card IP-Core V1
- Detailed Description
- IP-Core
- Software Driver
- Configuration Examples
- 16x Type K Thermocouple at ChannelGroup A
- 9x 2-wire PT100 at ChannelGroup A
- Designed by
Resolver Interface
- Introduction
- Setup
- More functioniality
Resolver PL Interface
- Interface Definition
- Example Usage
AXI GPIO
- Reference
- Example
- Driver and test implementation