UltraZohm

Repository

  • ultrazohm_sw

Getting-Started

  • Onboarding
  • Toolchain installation
  • UltraZohm Setup
  • Tutorials

General

  • System Overview
  • Project structure
  • Infrastructure
  • How to guides
  • Use-cases

MPSoC Platform

  • Platform Architecture
  • RPU Software
  • APU Software
  • Software Framework
  • Vivado Framework
  • IP Cores
    • PWM and SS Control V3
    • PWM and SS Control V4
    • Mux Axi / ISR Trigger Control
    • ADC LTC2311
    • ADC LTC2311 V3
    • Incremental Encoder
    • Interlock Module
    • AXI Test IP
    • Interlock and Deadtime module (2L)
    • PT1 plant model
    • PMSM Model
    • Inverter Model
    • Data Mover / AXI2TCM
    • dq-Transformation IP-Core
    • uz_mlp_three_layer
    • uz_dac_spi_interface
    • RS Flip Flop
    • Inverter Adapter
    • CIL PMSM
  • CPLD

User Software

  • GUI

Codegeneration

  • HDL-Coder (HDL)
  • Vivado HLS (HDL)
  • Embedded-Coder (C-Code)

Hardware

  • Carrier Board
  • Adapter Cards
  • Interface to power electronics
  • Altium
UltraZohm
  • IP Cores
  • Edit on Bitbucket
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IP Cores

IP Cores

  • PWM and SS Control V3
    • Idea
    • Basics
    • Designed by
  • PWM and SS Control V4
    • IP-Core Hardware
    • Example usage
    • Driver reference
  • Mux Axi / ISR Trigger Control
    • PWM counter events
    • Interrupt sources
    • ADC/ISR trigger ratio
    • Example
    • IP-Core
    • Software driver
    • Reference
  • ADC LTC2311
    • Idea
    • Basics
    • Designed by
  • ADC LTC2311 V3
    • Introduction
    • Software Driver
    • Functional Description
    • I/O Signals (Interface)
    • Terminology
    • Example
    • Downloads
  • Incremental Encoder
    • Configuration
    • Hardware filter of rotational speed
    • IP-Core Hardware
    • Software driver
  • Interlock Module
    • Idea
    • Basics
    • Designed by
  • AXI Test IP
    • Driver function reference
  • Interlock and Deadtime module (2L)
    • Software Driver
    • IP-Core Hardware
    • Vivado Example
  • PT1 plant model
    • IP-Core Hardware
    • Example usage
    • Driver reference
  • PMSM Model
    • System description
    • IP-Core overview
    • Example usage
    • Driver reference
  • Inverter Model
    • Model Description
    • IP-Core Interfaces
    • Driver Reference
    • Example Usage
    • Reference
  • Data Mover / AXI2TCM
    • Tightly Coupled Memory (TCM)
    • IP-Core
    • Software driver
    • Reference
  • dq-Transformation IP-Core
    • Vitis
    • Vivado
  • uz_mlp_three_layer
    • Usage
    • Implementation details
    • Interfaces
    • Sources
  • uz_dac_spi_interface
    • Software interface
    • IP-Core interface (Vivado)
    • References
  • RS Flip Flop
  • Inverter Adapter
    • Hardware Interface Definition
    • Organization of the sources
    • Example Usage
    • Reference
  • CIL PMSM
    • General description
    • General setup
    • Examples
    • References
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